App. Res. of Comp. Accepted Paper
Vol. 43, 2026 No. 9

Adaptive register grouping and allocation mechanism and compiler optimizationfor risc-v vector architectures

Xu Siyi
Jiang Zhiyuan
Jiang Limin
Cao Shan
School of Communication and Information Engineering, Shanghai University, Shanghai 200444, China
DOI: 10.19734/j.issn.1001-3695.2026.01.0020

Abstract

To address the suboptimal register utilization, redundant loop iterations, and other inefficiencies caused by the constraint that the Length Multiplier (LMUL) in the RISC-V “V” Vector Extension (RVV) supports only power-of-two configurations, this paper proposes a fine-grained Adaptive Register Grouping and Allocation Mechanism (ARGAM) . By enabling dynamically configurable vector register-group lengths, the mechanism breaks the restrictions imposed by the traditional LMUL scheme and is fully implemented within the LLVM compiler infrastructure. Experiments conducted on a customized RISC-V vector simulation platform show that, for the 1200-point mixed-radix Fast Fourier Transform, the mechanism leverages the characteristics of Radix-5 and Radix-3 algorithms to reduce strip-mining iterations by 31.6%, decrease dynamic instruction count by 30.9%, and improve the time-weighted average register utilization from 50.5% to 71.6%. For deep-learning fconv2d operators with non-power-of-two kernels (e. g. , 3×3) , it achieves up to a 3.15× reduction in dynamic instruction count and a 31.3% improvement in register utilization. The proposed method effectively alleviates register-group granularity mismatch across diverse workloads and substantially enhances resource utilization.

Foundation Support

国家自然科学基金资助项目(62271300)
上海市科委科技计划资助项目(25DP1501502,24DP1501100,24DP1500600)

Publish Information

DOI: 10.19734/j.issn.1001-3695.2026.01.0020
Publish at: Application Research of Computers Accepted Paper, Vol. 43, 2026 No. 9

Publish History

[2026-05-26] Accepted Paper

Cite This Article

徐思懿, 姜之源, 江立旻, 等. 面向RISC-V向量架构的寄存器自适应分组分配机制与编译优化 [J]. 计算机应用研究, 2026, 43 (9). (2026-06-02). https://doi.org/10.19734/j.issn.1001-3695.2026.01.0020. (Xu Siyi, Jiang Zhiyuan, Jiang Limin, et al. Adaptive register grouping and allocation mechanism and compiler optimizationfor risc-v vector architectures [J]. Application Research of Computers, 2026, 43 (9). (2026-06-02). https://doi.org/10.19734/j.issn.1001-3695.2026.01.0020. )

About the Journal

  • Application Research of Computers Monthly Journal
  • Journal ID ISSN 1001-3695
    CN  51-1196/TP

Application Research of Computers, founded in 1984, is an academic journal of computing technology sponsored by Sichuan Institute of Computer Sciences under the Science and Technology Department of Sichuan Province.

Aiming at the urgently needed cutting-edge technology in this discipline, Application Research of Computers reflects the mainstream technology, hot technology and the latest development trend of computer application research at home and abroad in a timely manner. The main contents of the journal include high-level academic papers in this discipline, the latest scientific research results and major application results. The contents of the columns involve new theories of computer discipline, basic computer theory, algorithm theory research, algorithm design and analysis, blockchain technology, system software and software engineering technology, pattern recognition and artificial intelligence, architecture, advanced computing, parallel processing, database technology, computer network and communication technology, information security technology, computer image graphics and its latest hot application technology.

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